It should also be understood that the memory mentioned in the embodiments of the present invention may be a volatile memory or a nonvolatile memory, or may include both volatile and nonvolatile memories. The storage medium is located in the memory, and the processor reads the information in the memory, and completes the steps of the above method in combination with its hardware. The software module can be located in a mature storage medium in the field such as random access memory, flash memory, read-only memory, programmable read-only memory or electrically erasable programmable memory, register. The steps of the method disclosed in connection with the embodiments of the present application may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. A general-purpose processor may be a microprocessor, or the processor may be any conventional processor, or the like. Various methods, steps, and logic block diagrams disclosed in the embodiments of the present application may be implemented or executed. It should be understood that the above-mentioned processor may be a general-purpose processor, a digital signal processor (digital signal processor, DSP), an application specific integrated circuit (application specific integrated circuit, ASIC), an off-the-shelf programmable gate array (field programmable gate array, FPGA) or Other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, can also be a system chip (system on chip, SoC), or a central processor unit (central processor unit, CPU), or a network processor (networkprocessor, NP), can also be a digital signal processing circuit (digital signal processor, DSP), can also be a microcontroller (micro controller unit, MCU), can also be a programmable controller (programmable logicdevice, PLD) or other Integrated chip.
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